The i.MX95 CPU has:

  • one USB 2.0 port with integrated PHY, which can operate as host or device, but OTG functionality is not supported.

  • one USB 3.0 port with integrated PHY. When operating in USB 2.0 mode, it can function as host or device, but OTG functionality is not supported.

NXP documentation uses inconsistent naming for the i.MX95 USB controllers. In this Digi software documentation, USB3 refers to the USB 3.0 / SuperSpeed controller, while USB2 refers to the USB 2.0 controller. Note, however, that schematics, NXP datasheet, and pad names refer to the USB 3.0 controller as USB1 (for example, USB1_xx pads), whereas NXP Hardware Reference Manual and Linux device tree sources typically name it USB3. The USB 2.0 controller is consistently associated with USB2 / USB2_xx.

Available USB interfaces

On the ConnectCore 95 SMT SOM:

  • USB2 is available on the LGA pads (on lines USB2_xx).

  • USB3 is available on the castellated pads and the LGA pads (on lines USB1_xx).

On the ConnectCore 95 SMARC SOM:

To comply with SMARC specification the SMARC SOM contains some multiplexing circuitry controlled by the FORCE_RECOV# line.

See the ConnectCore 95 Hardware Reference Manuals for detailed information on how the USB ports are routed to the SMARC USB ports.

On the ConnectCore 95 Development Kit:

By default, when FORCE_RECOV# is de-asserted:

  • USB3 (SMARC_USB2) is routed to USB 3.0 port (J28 connector)

  • USB2 (SMARC_USB0) is routed through a multiplexer to:

    • Type-C connector (J41 RECOVERY connector), for USB peripheral functionality, or

    • a four-port USB hub that makes it available at:

      • a stackable dual USB Type-A connector (J40 connector)

      • the XBee socket

      • the M.2 E-Key connector (and optionally to M.2 B-Key connector through 0-ohm resistors)

The multiplexer is controlled by an existing voltage in VBUS. When a cable connected to J41 carries a voltage in VBUS, the multiplexer carries the signals to this connector and the four-port USB hub is disconnected.

For USB recovery functionality refer to Recover your device.

Kernel configuration

You can manage the USB 2.0 support through the kernel configuration options:

  • Support for Host-side USB (CONFIG_USB)

  • EHCI HCD (USB 2.0) support (CONFIG_USB_EHCI_HCD)

  • ChipIdea Highspeed Dual Role Controller (CONFIG_USB_CHIPIDEA)

  • ChipIdea device controller (CONFIG_USB_CHIPIDEA_UDC)

  • ChipIdea host controller (CONFIG_USB_CHIPIDEA_HOST)

  • Freescale MXS USB PHY support (CONFIG_USB_MXS_PHY)

  • OTG support (CONFIG_USB_OTG)

  • Type-C Port (CONFIG_TYPEC_TCPCI)

You can manage the USB 3.0 support through the kernel configuration options:

  • Cadence USB3 Dual-Role Controller (CONFIG_USB_CDNS3)

  • Cadence USB3 host controller (CONFIG_USB_CDNS3_HOST)

  • Cadence USB3 device controller (CONFIG_USB_CDNS3_GADGET)

All of these kernel configuration options are enabled as built-in on the default ConnectCore 95 kernel configuration file.

The USB device driver provides the functionality for the USB gadget drivers. The USB gadget drivers implement one or more "functions", each providing a different capability.

The following gadget drivers are supported and enabled as loadable modules on the default ConnectCore 95 kernel configuration file.

  • Mass Storage Gadget (CONFIG_USB_MASS_STORAGE)

  • Ethernet Gadget with CDC Ethernet support (CONFIG_USB_ETH)

  • Serial Gadget with ACM and CDC OBEX support (CONFIG_USB_G_SERIAL)

Gadget drivers are enabled as loadable modules because only one gadget function can be used at a time. Before using a gadget driver, you must first make sure no other gadget driver is loaded.

Kernel driver

The i.MX95 universal serial bus (USB) driver implements a standard Linux driver interface to the CHIPIDEA USB-HS On-The-Go (OTG) controller. The CHIPIDEA USB controller is enhanced host controller interface (EHCI) compliant.

The i.MX95 USB drivers are located at drivers/usb/.

File Description

chipidea/core.c

Chipidea IP core driver

chipidea/udc.c

Chipidea peripheral driver

chipidea/host.c

Chipidea host driver

chipidea/ci_hdrc_imx.c

i.MX glue layer

chipidea/otg.c

Chipidea OTG driver

chipidea/otg_fsm.c

Chipidea OTG HNP and SRP driver

chipidea/usbmisc_imx.c

i.MX SoC abstract layer

phy/phy-mxs-usb.c

i.MX USB physical driver

tcpm/tcpci.c

Type-C Port Controller Interface driver

Device tree bindings and customization

The i.MX95 USB controller device tree bindings are documented at Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml.

The i.MX95 USB 3.0 controller device tree bindings are documented at Documentation/devicetree/bindings/usb/cdns,usb3.yaml.

Example: ConnectCore 95 Development Kit

USB3 port is configured as USB 3.0, supporting dual-role (as host or device).

ConnectCore 95 Development Kit device tree
&usb2 {
	vbus-supply = <&reg_5v_board>;
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&usb3 {
	status = "okay";
};

&usb3_dwc3 {
	dr_mode = "otg";
	hnp-disable;
	srp-disable;
	adp-disable;
	usb-role-switch;
	role-switch-default-mode = "host";
	snps,dis-u1-entry-quirk;
	snps,dis-u2-entry-quirk;
	status = "okay";

	port {
		usb3_drd_sw: endpoint {
			remote-endpoint = <&typec_dr_sw>;
		};
	};
};


&usb3_phy {
	vbus-supply = <&reg_5v_board>;
	fsl,phy-pcs-tx-deemph-3p5db-attenuation-db = <17>;
	fsl,phy-pcs-tx-swing-full-percent = <100>;
	fsl,phy-tx-preemp-amp-tune-microamp = <600>;
	fsl,phy-tx-vboost-level-microvolt = <1156>;
	status = "okay";

	port {
		usb3_data_ss: endpoint {
			remote-endpoint = <&typec_con_ss>;
		};
	};
};

Configure USB as device

To use the USB2 interface as USB device, make the following change to the device tree:

ConnectCore 95 Development Kit device tree
diff --git a/arch/arm64/boot/dts/digi/ccimx95-dvk.dts b/arch/arm64/boot/dts/digi/ccimx95-dvk.dts
@@ -381,7 +381,7 @@ &sai3 {

 &usb2 {
        vbus-supply = <&reg_5v_board>;
-       dr_mode = "host";
+       dr_mode = "peripheral";
        disable-over-current;
        status = "okay";
 };

Use the USB port

See the following topics for information on how to use the USB port.