The STM32MP25 CPU has two USB controllers, both with integrated PHYs:

  • One USB 2.0 host high-speed port.

  • One USB 3.0 DRD port (5 Gbit/s) configurable as host or device. This port can also operate as a second USB 2.0 host high-speed port, thus releasing the super-speed COMBOPHY for the PCIe functionality.

USB interfaces on the ConnectCore MP25

On the ConnectCore MP25 system-on-module both USB ports are available for peripheral use.

On the ConnectCore MP25 Development Kit:

  • USB2H is connected to a four-port USB hub.

  • USB3DR is available at the USB type-C connector.

PCIe PHY (COMBOPHY) is shared with USB3DR controller. Only one protocol can be active at a time.

USB3DR SuperSpeed capability is disabled in the default ConnectCore MP25 Development Kit device tree in favor of PCIe support.

USB 3.0 type-C wire orientation detection is not supported yet; only one orientation works by default. If your devices are not recognized, change the type-C cable orientation.

Kernel configuration

You can manage the USB ports support through the kernel configuration options:

  • Support for Host-side USB (CONFIG_USB)

  • DesignWare USB2 DRD Core Support (CONFIG_USB_DWC2)

  • ChipIdea device controller (CONFIG_USB_CHIPIDEA_UDC)

  • DesignWare USB3 DRD Core Support (CONFIG_USB_DWC3)

  • STM32 DWC3 support (CONFIG_USB_DWC3_STM32)

  • STMicroelectronics STM32 USB2 FEMTO PHY Controller driver (CONFIG_PHY_STM32_USB2FEMTO)

All of these kernel configuration options are enabled as built-in on the default ConnectCore MP25 kernel configuration file.

The USB device driver provides the functionality for the USB gadget drivers. The USB gadget drivers implement one or more "functions", each providing a different capability.

The following gadget drivers are supported and enabled as loadable modules on the default ConnectCore MP25 kernel configuration file.

  • Mass Storage Gadget (CONFIG_USB_MASS_STORAGE)

  • Ethernet Gadget with CDC Ethernet support (CONFIG_USB_ETH)

  • Serial Gadget with ACM and CDC OBEX support (CONFIG_USB_G_SERIAL)

Gadget drivers are enabled as loadable modules because only one gadget function can be used at a time. Before using a gadget driver, you must first make sure no other gadget driver is loaded.

Kernel driver

The STM32MP25 universal serial bus (USB) driver implements a standard Linux driver interface to the CHIPIDEA USB controller. The CHIPIDEA USB controller is enhanced host controller interface (EHCI) compliant.

The STM32MP25 USB drivers are located at:

File Description

chipidea/core.c

Chipidea IP core driver

chipidea/udc.c

Chipidea peripheral driver

chipidea/host.c

Chipidea host driver

drivers/phy/st/phy-stm32-usb2femto.c

STMicroelectronics STM32 USB2 FEMTO PHY Controller driver

dwc3/dwc3-stm32.c

DesignWare Core USB3 controller on STM32 SOCs driver

Device tree bindings and customization

The STM32MP25 USB controller device tree bindings are documented at Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt.

Example: ConnectCore MP25 Development Kit

The USB2H port works as host only. The USB3DR port is configured by default to work as USB 2.0 host.

ConnectCore MP25 Development Kit device tree
/ {
	/* USB 3.0 Data switch */
	usb3_data_switch: cbtl04gp {
		compatible = "nxp,cbtu02043";
		switch-gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>; /* USBC_BUS_SEL */
		shutdown-gpios = <&gpiod 10 GPIO_ACTIVE_LOW>; /* USBC_SW_PWR */
		orientation-switch;
		status = "disabled";

		port {
			typec_ep: endpoint {
				remote-endpoint = <&dwc3_ep>;
			};
		};
	};
};

&combophy {
	clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>, <&pad_clk>;
	clock-names = "apb-clk", "ker-clk", "pad-clk";
	status = "okay";
};

/* USB 2.0 Host */
&usb2_phy1 {
	vdd33-supply = <&scmi_vdd3v3_usb>;
	status = "okay";
};

&usbh {
	status = "okay";
};

&usbh_ehci {
	status = "okay";
};

/* USB 2.0/3.0 Host/Device */
&usb2_phy2 {
	vdd33-supply = <&scmi_vdd3v3_usb>;
	status = "okay";
};

&usb3dr {
	status = "okay";

	dwc3: usb@48300000 {
		maximum-speed = "high-speed";
		usb-role-switch;

		port {
			dwc3_ep: endpoint {
				remote-endpoint = <&typec_ep>;
			};
		};
	};
};

USB SuperSpeed

The STM32MP25 integrates a COMBOPHY, which supports USB 3.0 SuperSpeed and PCIe gen2. By default, the ConnectCore MP25 Development Kit connects the COMBOPHY to the Mini PCIe socket supporting the PCIe interface.

You can connect the COMBOPHY to the USB type-C port by swapping some 0-ohm resistors. See USB type-C port controller in the pfm-name-som Hardware Reference Manual.

Digi provides a device tree overlay called ccmp25-dvk_usb-3-0-typec.dtso to configure the USB3DR port for SuperSpeed mode. This overlay enables the data switch, disables the PCIe, and configures SuperSpeed mode in the port.

To load this device tree overlay, add it to the overlays variable in U-Boot:

=> setenv overlays ccmp25-dvk_usb-3-0-typec.dtso,${overlays}
=> saveenv

This overlay configures the port as USB host.

To use the port in peripheral mode, make the following change in the overlay and rebuild it:

@@ -84,7 +84,7 @@ __overlay__ {
			maximum-speed = "super-speed";
			phys = <&usb2_phy2>, <&combophy PHY_TYPE_USB3>;
			phy-names = "usb2-phy", "usb3-phy";
-			role-switch-default-mode = "host";
+			role-switch-default-mode = "peripheral";

			port {
				dwc3_ep: endpoint {
@@ -93,12 +93,4 @@ dwc3_ep: endpoint {
			};
		};
	};
-
-	/* Enable USB regulator */
-	fragment@7 {
-		target = <&reg_5v_usb_pwr_sw>;
-		__overlay__ {
-			regulator-always-on;
-		};
-	};
};

To achieve SuperSpeed data rates:

  • When using the port as host, connect a SuperSpeed-compatible device (not all devices and USB disks are)

  • When using the port as device:

    • Use a SuperSpeed-compatible cable (not just a regular type-C; it must be SuperSpeed-capable)

    • Connect the cable to a SuperSpeed-capable port on your PC (blue connector)

Using the USB port

See the following topics for information on how to use the USB port.