The NXP i.MX95 CPU has eight low-power SPI (LPSPI) buses.

On the ConnectCore 95 SMT SOM:

  • All eight LPSPI ports are available (multiplexed with other functionality) either on the castellated or LGA pads.

On the ConnectCore 95 SMARC SOM:

  • LPSPI1 is connected to SPI0 of the SMARC connector, with two chip selects.

  • FlexSPI is connected to shared SPI1/QSPI/eSPI of the SMARC connector, with two chip selects.

  • LPSPI3 and LPSPI6 are available in other pads of the SMARC connector, multiplexed with other functionality (outside of the SMARC specification).

On the ConnectCore 95 Development Kit:

  • LPSPI1 is routed to J24 connector

  • FlexSPI is routed to J26 connector

Kernel configuration

You can manage the SPI driver support through the kernel configuration option:

  • Freescale i.MX LPSPI controllers in master mode (CONFIG_SPI_FSL_LPSPI)

  • Freescale QSPI controller (CONFIG_SPI_FSL_QUADSPI)

  • NXP Flex SPI controller (CONFIG_SPI_NXP_FLEXSPI)

This options are enabled as built-in on the default ConnectCore 95 kernel configuration file.

Kernel driver

File Description

drivers/spi/spi-fsl-lpspi.c

Freescale i.MX LPSPI controllers in master mode

drivers/spi/spi-fsl-qspi.c

Freescale QSPI controller

drivers/spi/spi-nxp-fspi.c

NXP Flex SPI controller

Device tree bindings and customization

The LPSPI interface device tree binding is documented at Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml.

The QSPI interface device tree binding is documented at Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml.

The FlexSPI interface device tree binding is documented at Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml.

The common i.MX95 CPU device tree defines all the SPI ports. The platform device tree must:

  • Enable the required SPI port, by setting the status property to "okay".

  • Choose the chip selects using property cs-gpios and their number using property num-cs.

  • Configure the IOMUX of the pads that will work as SPI port.

  • Add the SPI slave devices as children of the SPI bus node.

SPI user space usage

The SPI bus cannot be accessed directly from user space. Instead, it is accessed via the SPI client drivers.

Sample application

An example application called apix-spi-example is included in the dey-examples-digiapix recipe (part of dey-examples package) of the meta-digi layer. This application is an example of how to write data to an external EEPROM (24FC1026) and read it back using Digi APIx library on the ConnectCore 95 platform.

Go to GitHub to see the application instructions and source code.

See SPI API for more information about the SPI APIx.