The following table lists all available MCA IOs and their capabilities:
| MCA IO | PAD LGA/CS* | Digital I/O | IRQ-capable | Debounce-capable | ADC | PWM |
|---|---|---|---|---|---|---|
SWD_DIO/MCA_IO0 |
AN26/57 |
|
|
|
|
|
MCA_IO1 |
AN21/52 |
|
|
|
|
|
MCA_IO2 |
AN22/53 |
|
|
|
|
|
MCA_IO3 |
AN23/54 |
|
|
|
|
|
MCA_IO4 |
AL27/61 |
|
|
|
|
|
MCA_IO5 |
AL28/62 |
|
|
|
|
|
MCA_IO6 |
AK29/63 |
|
|
|
|
|
MCA_IO7 |
AJ29/64 |
|
|
|
|
|
MCA_IO8 |
AH29/65 |
|
|
|
|
|
MCA_IO9 |
AG29/66 |
|
|
|
||
MCA_IO10 |
AF29/67 |
|
|
|
||
MCA_IO11 |
AM26 |
|
|
|
||
MCA_IO12 |
AM25 |
|
|
|
|
|
MCA_IO13 |
AL22 |
|
|
|
||
MCA_IO14 |
AL26 |
|
|
|
|
|
MCA_IO15 |
AL25 |
|
|
|
|
|
MCA_IO16 |
AL24 |
|
|
|
|
|
MCA_IO17 |
AL23 |
|
|
|
|
|
MCA_IO18 |
AM23 |
|
|
|
|
* CS = castellated pads
|
Some of the MCA GPIO pins can be configured as ADC channels. When configured as ADC channel, a GPIO cannot be requested as a standard GPIO. For information about configuring an MCA pin as ADC channel, see Analog-to-Digital Converter (ADC). |
