PR (Pull-up/Down Resistor Enable)
This command applies to the XBee 868LP RF Module.
The bit field that configures the internal pull-up
- If you set a PR bit to 1, it enables the pull-up/down resistor
- If you set a PR bit to 0, it specifies no internal pull-up/down resistor.
PR and PD only affect lines that are configured as digital inputs or disabled.
The following table defines the bit-field map for PR and PD commands.
| Bit | I/O line | Device pin | Range |
|---|---|---|---|
| 0 | DIO4/AD4 | pin 24 | 40 kΩ |
| 1 | DIO3/AD3 | pin 30 | 40 kΩ |
| 2 | DIO2/AD2 | pin 31 | 40 kΩ |
| 3 | DIO1/AD1 | pin 32 | 40 kΩ |
| 4 | DIO0/AD0 | pin 33 | 40 kΩ |
| 5 |
DIO6/RTS |
pin 29 | 40 kΩ |
| 6 |
DIO8/SLEEP_RQ/DTR |
pin 10 | 40 kΩ |
| 7 |
DIN/CONFIG |
pin 4 | 40 kΩ |
| 8 | DIO5/ASSOCIATE | pin 28 | 40 kΩ |
| 9 |
DIO9/On/SLEEP |
pin 26 | 40 kΩ |
| 10 | DIO12 | pin 5 | 40 kΩ |
| 11 | DIO10/PWM0/RSSI | pin 7 | 40 kΩ |
| 12 | DIO11/PWM1 | pin 8 | 40 kΩ |
| 13 |
DIO7/CTS |
pin 25 | 40 kΩ |
| 14 | DOUT | pin 3 | 40 kΩ |
| 15 | DIO15/SPI_MISO | pin 17 | 40 kΩ |
| 16 | DIO16/SPI_MOSI | pin 16 | 40 kΩ |
| 17 | DIO17/SPI_SSEL | pin 15 | 40 kΩ |
| 18 | DIO18/SPI_SCLK | pin 14 | 40 kΩ |
| 19 | DIO19/SPI_ATTN | pin 12 | 40 kΩ |
Parameter range
0 - 0xFFFFF (bit field)
Default
0xFFFFF
PDF
